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FS26 Datenblatt(PDF) 84 Page - NXP Semiconductors |
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FS26 Datenblatt(HTML) 84 Page - NXP Semiconductors |
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84 / 156 page ![]() NXP Semiconductors FS26 Safety system basis chip with low power for ASIL D/ASIL B Bit Bit Group Name Description Value Settings 0h Disabled 3 WK2PD_OTP WAKE2 pull-down RPD_WAKE 1h Enabled 0h Disabled 2 WK1PD_OTP WAKE1 pull-down RPD_WAKE 1h Enabled 0h Low-voltage threshold 1 WK2TH_OTP WAKE2 detection threshold VIL_WAKEx / VIH_WAKEx 1h High-voltage threshold 0h Low-voltage threshold 0 WK1TH_OTP WAKE1 detection threshold VIL_WAKEx / VIH_WAKEx 1h High-voltage threshold Table 95. OTP_INPUT_CFG register bit description...continued Go to main OTP configuration map 17.2.28 OTP_PROG_IDH Bit Bit Group Name Description Value Settings 00h A 01h B 02h C 03h D 04h E 05h F 06h G 07h H 08h J 09h K 0Ah L 0Bh M 0Ch N 0Dh P 0Eh Q 0Fh R 10h S 11h T 12h U 13h V 14h W 15h X 16h Y 7 to 0 PROG_IDH_OTP[7:0] Program ID high decoding 17h Z Table 96. OTP_PROG_IDH register bit description Go to main OTP configuration map FS26_SDS All information provided in this document is subject to legal disclaimers. © 2025 NXP B.V. All rights reserved. Product short data sheet Rev. 6.0 — 12 December 2025 Document feedback 84 / 156 |
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