FS26 datasheet(31/156 Pages) NXP

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NXP Semiconductors

FS26

Safety system basis chip with low power for ASIL D/ASIL B

aaa-045450

RSTB release

Normal mode

YES

Write all INIT_FS registers

To configure Safety outputs

reaction and configure Watchdog

LBIST or ABIST Fail will

prevent safety outputs release.

Possibility to go to low power

modes or restart the device

ABIST = OK

LBIST = OK

Close INIT FS with x1 good

Watchdog refresh

Decrease FLT_ERR_CNT to `0'

with WD_RFR_LIMIT +1

good WD refreshes

Write command to

RELEASE_FS0B_FS1B[15:0]

SW action

Information

Device

event

Figure 14. Application flowchart

15.3 Input power topology

The FS26 provides two input topologies to address various system needs. A reverse protection Schottky diode

(DBAT) between battery voltage (VBAT) and the FS26 is required. Depending on the system configuration, the

FS26 can obtain VSUP in two main configurations:

1. The switching boost controller (VBST) can be used as the front-end supply to support system cranking

events with voltage drops down to 2.7 V at the VBST_IN input.

When VBST is used as the front-end supply, the battery voltage (VBAT) is applied at the input of the boost

controller. During normal operation when VSUP > VBST, the boost controller stops switching and operates in

pass-through mode.

FS26_SDS

All information provided in this document is subject to legal disclaimers.

Product short data sheet

Rev. 6.0 — 12 December 2025

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