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Datenblatt-Suchmaschine für elektronische Bauteile |
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Datenblatt-Suchmaschine für elektronische Bauteile |
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FS26 Datenblatt(PDF) 68 Page - NXP Semiconductors |
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FS26 Datenblatt(HTML) 68 Page - NXP Semiconductors |
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68 / 156 page  NXP Semiconductors FS26 Safety system basis chip with low power for ASIL D/ASIL B Register Name ADDRESS (Hex) BIT7 BIT6 BIT5 BIT4 BIT3 BIT2 BIT1 BIT0 OTP_ GPIO2_CFG 39 — GPIO2 PD_OTP GPIO2 PU_OTP GPIO2STAGE_OTP[1:0] GPIO2_SLOT_OTP[2:0] OTP_ INPUT_CFG 3A WK2PD_ SEL_OTP WK1PD_ SEL_OTP GPIO2 TH_OTP GPIO1TH_OTP WK2PD_OTP WK1PD_OTP WK2 TH_OTP WK1 TH_OTP OTP_ PROG_IDH 3B PROG_IDH_OTP[7:0] OTP_ PROG_IDL 3C PROG_IDL_OTP[7:0] Table 68. Main OTP configuration map...continued 17.2 Main OTP registers bit description 17.2.1 OTP_SYS_CFG1 Bit Bit Group Name Description Value Settings 1h 200 ms 2h 400 ms 3h 800 ms 4h 1600 ms 5h 3200 ms 6h 6400 ms 7h 12800 ms 8h 25600 ms 9h 51200 ms Ah 102400 ms Bh 204800 ms Ch 409600 ms Dh 819200 ms Eh 1638400 ms 7 to 4 RETRY_MSK_OTP[3:0] Retry counter time limit Fh 3276800 ms 0h Limited retry 3 RETRY_MODE_OTP Auto-retry mode 1h Infinite retry 0h Enabled 2 RETRY_DIS_OTP Auto-retry power up from DFS 1h Disabled 0h Enabled 1 WK1DFS_DIS_OTP Exit DFS on WAKE1 event 1h Disabled 0h 4.3 V / 4.8 V 0 VSUP_UVTH_OTP VSUP UV threshold VSUP_UVL / VSUP_UVH 1h 5.65 V / 6.1 V Table 69. OTP_SYS_CFG1 register bit description Go to main OTP configuration map 17.2.2 OTP_SYS_CFG2 Bit Bit Group Name Description Value Settings 7 MDFS_DIS_OTP Disable Deep Fail Safe entry 0h DFS entry enabled Table 70. OTP_SYS_CFG2 register bit description FS26_SDS All information provided in this document is subject to legal disclaimers. © 2025 NXP B.V. All rights reserved. Product short data sheet Rev. 6.0 — 12 December 2025 Document feedback 68 / 156 |
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