FS26 datasheet(36/156 Pages) NXP

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NXP Semiconductors

FS26

Safety system basis chip with low power for ASIL D/ASIL B

aaa-045458

VBAT

VBOS

VDIG

SLOT_7

SLOT_6

SLOT_1

SLOT_0

VPRE

VBST

RSTB

LPOFF SPI request

5x TSLOT

TSLOT

Figure 19. Power-down example with VBST as front-end supply

15.5 Wake-up sources

The FS26 has several selectable wake-up sources from the Low-power modes:

• WAKEx pin:

– The WAKEx pins can be configured to detect wake-up events internal or external to the ECU.

– The WAKEx pins can detect wake-up event on high level or low level.

• GPIOx pin:

– The GPIOx pins can be configured as inputs to detect wake-up events internal to the ECU.

– The GPIOx pins can detect wake-up event on high level or low level.

• SPI chip select wake-up (only when VDDIO is supplied):

– When the SPI wake up is enabled, the device wakes up with any activity on the SPI bus (transition from high

to low of CSB pin).

– In case of a SPI wake up, the first SPI command is ignored, and the FS26 will be able to respond to the

subsequent SPI commands after 1.5 ms.

• Long Duration Timer (LDT) expired:

– Wake up from the LDT is available (part number dependent).

– When the LDT is enabled, it can be configured to generate a wake-up event when the timer expires. This

feature allows the system to perform cyclic system verifications while it is in the Low-power mode.

15.6 SPI communication

The FS26 uses a 32-bit SPI, with the following arrangement:

MOSI (Main Out, Secondary In) bits:

• Bit 31: Main or fail-safe registers selection

• Bits 30 to 25: Register address

FS26_SDS

All information provided in this document is subject to legal disclaimers.

Product short data sheet

Rev. 6.0 — 12 December 2025

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