28HS01GTAM03 datasheet(102/138 Pages) INFINEON

102 / 138 page

Advanced

sector

protection

RDDYB_4_0

Read Dynamic Protection

Bit transaction reads the

contents of the DYB Access

(CMD)

ADDR

[31:24]

ADDR

[23:16]

ADDR

[15:8]

ADDR

[7:0]

Figure 27/

Figure 29

166 / 200

WRDYB_4_1

Write Dynamic Protection

Bit transaction writes to the

DYB Access Register

WRENB_

0_0

(CMD)

ADDR

[31:24]

ADDR

[23:16]

ADDR

[15:8]

ADDR

[7:0]

Input

Data

[7:0]

Figure 24/

Figure 26

RDPPB_4_0

Read Persistent Protection

Bit transaction reads the

contents of the PPB Access

(CMD)

ADDR

[31:24]

ADDR

[23:16]

ADDR

[15:8]

ADDR

[7:0]

Figure 27/

Figure 29

PRPPB_4_0

Program Persistent

Protection Bit transaction

programs / writes the PPB

protection.

WRENB_

0_0

(CMD)

ADDR

[31:24]

ADDR

[23:16]

ADDR

[15:8]

ADDR

[7:0]

Figure 20/

Figure 21

ERPPB_0_0

Erase Persistent Protection

Bit transaction sets all

persistent protection bits to

WRENB_

0_0

(CMD)

Figure 18/

Figure 19

N/A

WRPLB_0_0

Write PPB Protection Lock

Bit transaction clears the PPB

Lock to 0

WRENB_

0_0

(CMD)

RDPLB_4_0

Read Password Protection

Mode Lock Bit transaction

shifts out the 8-bit PPB Lock

first.

(CMD)

(ADDR)

Figure 27/

Figure 29

PWDUL_4_1

Password Unlock

transaction sends the 64-bit

password to flash device. If

the supplied password does

not match the hidden

password in the Password

and only a hardware reset or

POR will return the device to

standby state, ready for new

transactions such as a retry of

the PWDUL_0_1. If the

password does match, the

PPB Lock bit is set to 1.

(CMD)

(ADDR)

Passw

ord

[7:0]

Passw

ord

[15:8]

Passw

ord

[23:16]

Passw

ord

[31:24]

Passw

ord

[39:32]

Passw

ord

[47:40]

Passwo

[55:48]

Passwo

[63:56]

Figure 24/

Figure 25

N/A

Table 78

Octal (8S-8S-8S, 8D-8D-8D) transaction table (Continued)

Note

32. In case of Octal DDR protocol.

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