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FS26 Datenblatt(PDF) 111 Page - NXP Semiconductors |
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FS26 Datenblatt(HTML) 111 Page - NXP Semiconductors |
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111 / 156 page ![]() NXP Semiconductors FS26 Safety system basis chip with low power for ASIL D/ASIL B 19 System enhancement functions 19.1 Clock management of the Main domain The main clock management block is comprised of one high-frequency oscillator, one low-frequency system oscillator, and multiple dividers to generate clocking for the internal main digital state machine, for the low power clock, and for the switching regulators. The low-frequency oscillator runs at 98 kHz. This oscillator is used for the Long Duration Timer (LDT) and remains ON in Low-power modes to filter the wake-up sources. The high-frequency oscillator runs at 18 MHz by default. The frequency and the spread spectrum can be configured by SPI to reduce the emission of the oscillator fundamental frequency. The oscillator is used for the SMPS regulators and all the main domain timings. This oscillator is OFF in Low-power modes to reduce the current consumption. Two frequency dividers provide lower frequency clocks for the switching regulators: • CLK1 is set at the high-frequency oscillator divided by 8. • CLK2 is set at the high-frequency oscillator divided by 40. The frequency of the switching voltage regulators is assigned as shown in Table 111. Regulator CLK1 CLK2 VBST No Yes VCORE Yes No VPRE VPRE_CLK_OTP = 1 VPRE_CLK_OTP = 0 Table 111. Switching clock assignment aaa-045471 18 MHz INTERNAL OSCILLATOR (SPREAD SPECTRUM) CLK2 CLK1 DIVIDER 2 /40 (OTP) CLK_HIGH DIVIDER 1 /8 (OTP) PHASE SHIFTING PHASE SHIFTING Figure 34. Clock management block diagram 19.1.1 Manual frequency tuning The internal oscillator frequency runs at 18 MHz by default, and it is configurable via OTP from 16 MHz to 19 MHz with a 1 MHz frequency step. NXP recommends using 18 MHz as a reference value. CLK_FREQ_OTP[1:0] High-frequency oscillator CLK1 CLK2 00 16 MHz 2.000 MHz 400 kHz 01 17 MHz 2.125 MHz 425 kHz 10 (default) 18 MHz 2.250 MHz 450 kHz 11 19 MHz 2.375 MHz 475 kHz Table 112. Manual frequency tuning configuration FS26_SDS All information provided in this document is subject to legal disclaimers. © 2025 NXP B.V. All rights reserved. Product short data sheet Rev. 6.0 — 12 December 2025 Document feedback 111 / 156 |
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