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FS26 Datenblatt(PDF) 113 Page - NXP Semiconductors |
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FS26 Datenblatt(HTML) 113 Page - NXP Semiconductors |
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113 / 156 page ![]() NXP Semiconductors FS26 Safety system basis chip with low power for ASIL D/ASIL B TA = –40 °C to 125 °C, unless otherwise specified. VSUP_UVH < VSUP < 36 V, VPRE_PWM + VPRE_HDR < VSUP_PWR < 36 V, unless otherwise specified. All voltages are referenced to ground. Symbol Description Min Typ Max Unit FOSC_MOD_RANGE Spread spectrum range (around the nominal frequency) -6 — 6 % Table 113. Clock management electrical characteristics...continued 19.2 Analog multiplexer: AMUX Various internal and application voltages can be monitored through the AMUX pin. Examples include critical FS26 parameters and system level safety parameters. The channel to be monitored can be selected via the SPI. The maximum AMUX output voltage range is VDDIO. R5 RS R4 SPI R2 R1 R3 aaa-045472 COUT R7 R6 To MCU ADC AMUX VCORE - Signals with 7.5 or 14 divider ratio Signals without divider ratio Signals with 2.5 divider ratio Signals with 1.5 divider ratio VDDIO Buffer GND Mux AMUX [4:0] VPRE - LDO1 - LDO2 - VREF - TRK1 - TRK2 - VDDIO - VBOS - VBST - VSUP - WAKE1 - WAKE2 - GPIO1 - GPIO2 - BATSENSE - Temperature sensors - Internal voltages references - Internal biasing supply - Figure 36. AMUX block diagram 19.2.1 AMUX channel selection AMUX_EN AMUX[4:0] Signal selection for AMUX output AMUX_DIV = 0 AMUX_DIV = 1 0 xxxxx Disabled with AMUX pin pulled to ground N/A N/A 1 00000 (default) Disabled with AMUX pin in Hi-Z N/A N/A 1 00001 Low power bandgap for main domain (1.0 V ± 0.5 %) 1 1 1 00010 Bandgap for main domain (1.0 V ± 0.5 %) 1 1 1 00011 Bandgap for fail-safe domain (1.0 V ± 0.5 %) 1 1 1 00100 Analog voltage supply for main domain (1.6 V ± 50 mV) 1 1 Table 114. AMUX output selection FS26_SDS All information provided in this document is subject to legal disclaimers. © 2025 NXP B.V. All rights reserved. Product short data sheet Rev. 6.0 — 12 December 2025 Document feedback 113 / 156 |
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