28HS01GTAM03 datasheet(120/138 Pages) INFINEON

120 / 138 page

Datasheet

120 of 138

002-18216 Rev. *W

2022-01-18

256Mb/512Mb/1Gb SEMPER™ Flash

Octal interface, 1.8V/3.0V

Device identification

138h

JEDEC Basic Flash

Parameter DWORD-15

00h

Bits 31:24 = Reserved = FFh

Bit 23 = Hold or RESET Disable = Not Supported = 0b

Bits 22:0 = Not supported = 000000h

139h

00h

13Ah

00h

13Bh

FFh

13Ch

JEDEC Basic Flash

Parameter DWORD-16

F9h

Bit 7 = Reserved = 1

Bits 6:0 = Volatile or Nonvolatile Register and Write Enable Instruction for Status

xxx_xxx1b: Nonvolatile Status Register 1, powers-up to last written value, use

instruction 06h to enable write.

+ xxx_1xxxb: Nonvolatile/Volatile Status Register 1 powers-up to last written value in

the nonvolatile status register, use instruction 06h to enable write to nonvolatile

status register. Volatile status register may be activated after power-up to override

the nonvolatile status register, use instruction 50h to enable write and activate the

volatile status register.

+ xx1_xxxxb: Status Register 1 contains a mix of volatile and nonvolatile bits. The 06h

instruction is used to enable writing of the register.

+ x1x_xxxxb: Reserved

+ 1xx_xxxxb: Reserved

= 1111001b

13Dh

10h

Bits 23:14 = Exit 4-Byte Addressing

= xx_xx1x_xxxxb: Hardware reset

+ xx_x1xx_xxxxb: Software reset (see bits 13:8 in this DWORD)

+ xx_1xxx_xxxxb: Power cycle

+ x1_xxxx_xxxxb: Reserved

+ 1x_xxxx_xxxxb: Reserved

= 11_1110_0000b

Bits 13:8 = Soft Reset and Rescue Sequence Support

+ x1_xxxxb: issue reset enable instruction 66h, then issue reset instruction 99h. The

reset enable, reset sequence may be issued on 1, 2, or 4 wires depending on the

device operating mode.

= 010000b

13Eh

F8h

13Fh

A0h

Bits 31:24 = Enter 4-byte Addressing

+ xx1x_xxxxb: Supports dedicated 4-Byte address instruction set. Refer the vendor

datasheet for the instruction set definition

+ 1xxx_xxxxb: Reserved

= 1010_0000b

140h

JEDEC Basic Flash

Parameter DWORD-17

00h

Not Supported

141h

00h

142h

00h

143h

00h

144h

JEDEC Basic Flash

Parameter DWORD-18

00h

Bit 31 = High byte and low byte of 16-bit words are in the same order when read in

1-1-1 mode and 8-8-8 mode = 0b

Bit 30:29 = The Command Extension is the same as the Command = 00b

Bit 28 = Reserved = 0b

Bit 27:26 = Not supported = 00b

Bits 25:24 = First rising edge of DS in the middle of the first data bit, start of first data

bit aligned with the first falling edge of DS = 10b

Bit 23 = JEDEC SPI Protocol Reset Supported = 1b

Bit 22:18 = 01111b

Bits 17:0 = Reserved = 00000h

145h

00h

146h

BCh

147h

02h

148h

JEDEC Basic Flash

Parameter DWORD-19

00h

Not Supported

149h

00h

14Ah

00h

14Bh

00h

14Ch

JEDEC Basic Flash

Parameter DWORD-20

FFh

Bits 31:28 = Maximum operation speed of device in 8D-8D-8D mode when utilizing

Data Strobe = 1000b (200MHz) / 0111b (166MHz)

Bits 27:24 = 8D-8D-8D mode without using Data Strobe is not characterized = 1110b

Bits 23:20 = Maximum operation speed of device in 8S-8S-8S mode when utilizing

Data Strobe = 1000b (200MHz) / 0111b (166MHz)

Bits 19:16 = 8S-8S-8S mode without using Data Strobe is not characterized = 1110b

Bit 15:0 = Not supported = FFFFh

14Dh

FFh

14Eh

8Eh for HS-T

7Eh for HL-T

14Fh

8Eh for HS-T

7Eh for HL-T

Table 87

JEDEC SFDP Rev D parameter table (Continued)

SFDP byte address

SFDP DWORD name

Data

Description

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