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28HS01GTAM03 Datenblatt(PDF) 121 Page - Infineon Technologies AG

Teilenummer 28HS01GTAM03
Bauteilbeschribung  S256Mb/512Mb/1Gb SEMPER??Flash Octal interface, 1.8V/3.0V
PDF  138 Pages
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Hersteller  INFINEON [Infineon Technologies AG]
Direct Link  http://www.infineon.com
Logo INFINEON - Infineon Technologies AG

28HS01GTAM03 Datenblatt(HTML) 121 Page - Infineon Technologies AG

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Datasheet
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002-18216 Rev. *W
2022-01-18
256Mb/512Mb/1Gb SEMPER™ Flash
Octal interface, 1.8V/3.0V
Device identification
150h
JEDEC 4-Byte Address
Instructions Parameter
DWORD-1
41h
Supported = 1, Not Supported = 0
Bits 31:25 = Reserved = 1111_111b
Bit 24 = Support for (1-8-8) Page Program Command, Instruction = 8Eh = 0b
Bit 23 = Support for (1-1-8) Page Program Command, Instruction = 84h = 0b
Bit 22 = Support for (1-8-8) DTR READ Command, Instruction = FDh = 0b
Bit 21 = Support for (1-8-8) FAST_READ Command, Instruction = CCh = 0b
Bit 20 = Support for (1-1-8) FAST_READ Command, Instruction = 7Ch = 0b
Bit 19 = Support for nonvolatile individual sector lock write command, Instruction =
E3h = 1b
Bit 18 = Support for nonvolatile individual sector lock read command, Instruction =
E2h = 1b
Bit 17 = Support for volatile individual sector lock Write command, Instruction = E1h
= 1b
Bit 16 = Support for volatile individual sector lock Read command, Instruction = E0h
= 1b
Bit 15 = Support for (1-4-4) DTR_Read Command, Instruction = EEh = 0b
Bit 14 = Support for (1-2-2) DTR_Read Command, Instruction = BEh = 0b
Bit 13 = Support for (1-1-1) DTR_Read Command, Instruction = 0Eh = 0b
Bit 12 = Support for Erase Command – Type 4 = 1b
Bit 11 = Support for Erase Command – Type 3 = 0b
Bit 10 = Support for Erase Command – Type 2 = 0b
Bit 9 = Support for Erase Command – Type 1 = 1b
Bit 8 = Support for (1-4-4) Page Program Command, Instruction = 3Eh = 0b
Bit 7 = Support for (1-1-4) Page Program Command, Instruction = 34h = 0b
Bit 6 = Support for (1-1-1) Page Program Command, Instruction = 12h = 1b
Bit 5 = Support for (1-4-4) FAST_READ Command, Instruction = ECh = 0b
Bit 4 = Support for (1-1-4) FAST_READ Command, Instruction = 6Ch = 0b
Bit 3 = Support for (1-2-2) FAST_READ Command, Instruction = BCh = 0b
Bit 2 = Support for (1-1-2) FAST_READ Command, Instruction = 3Ch = 0b
Bit 1 = Support for (1-1-1) FAST_READ Command, Instruction = 0Ch = 0b
Bit 0 = Support for (1-1-1) READ Command, Instruction = 13h = 1b
151h
12h
152h
0Fh
153h
FEh
154h
JEDEC 4-Byte Address
Instructions Parameter
DWORD-2
21h
Bits 31:24 = DCh = Instruction for Erase Type 4
Bits 23:16 = Instruction for Erase Type 3: RFU
Bits 15:8 = Instruction for Erase Type 2: RFU
Bits 7:0 = 21h = Instruction for Erase Type 1
155h
FFh
156h
FFh
157h
DCh
158h
JEDEC xSPI Profile 1.0
DWORD-1
00h
Bits 7:0 = Read Fast Wrapped command not supported = 00h
159h
EEh
Bits 15:8 = Read Fast command = EEh (DDR Read)
15Ah
80h
Bit 23 = Number of Additional Modifier Bytes Used for Write any Register command =
4 bytes = 1b
Bit 22 = Number of Data Bytes Used for Write Register command = 1 byte = 0b
Bits 21:16 = Reserved = 000000b
15Bh
0Bh
Bit 31 = xSPI Support, Device implements the SFDP command in 8D-8D-8D protocol
mode as defined in the Jedec
xSPI spec = 0b
Bit 30 = SFDP Command in 8D-8D-8D mode  Dummy Cycles = 8 bytes = 0b
Bit 29 = Number of Additional Modifier Bytes Used for Read Status Register command
= 0 bytes = 0b
Bit 28 = Initial Latency (CK cycles) for Read Status Register command = 3 CK Cycle = 0b
Bit 27 = Number of Additional Modifier Bytes Used for Read Register command = 4
bytes = 1b
Bit 26 = Initial Latency (CK cycles) for Read Volatile Register command = 4CK = 0b
Bit 25 = Initial Latency (CK cycles) for Read Volatile Non-Register command = 8 CK
cycles = 1b
Bit 24 = Number of Additional Modifier Bytes Used for Write Status-Cfg Register
command= 4 bytes = 1b
15Ch
JEDEC xSPI Profile 1.0
DWORD-2
71h
Write Nonvolatile Register command
15Dh
71h
Write Volatile Register command
15Eh
65h
Read NV Register command
15Fh
65h
Read Volatile Register command
Table 87
JEDEC SFDP Rev D parameter table (Continued)
SFDP byte address
SFDP DWORD name
Data
Description



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