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Datenblatt-Suchmaschine für elektronische Bauteile |
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Datenblatt-Suchmaschine für elektronische Bauteile |
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28HS01GTAM03 Datenblatt(PDF) 123 Page - Infineon Technologies AG |
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28HS01GTAM03 Datenblatt(HTML) 123 Page - Infineon Technologies AG |
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123 / 138 page  Datasheet 123 of 138 002-18216 Rev. *W 2022-01-18 256Mb/512Mb/1Gb SEMPER™ Flash Octal interface, 1.8V/3.0V Device identification 178h Status, Control and Configuration Register Map DWORD-4 88h Bit 31 = Generic Addressable Read Status/Control register command for nonvolatile registers supported for some (or all) registers = 1b Bit 30 = Generic Addressable Write Status/Control register command for nonvolatile registers supported for some (or all) registers = 1b Bits 29:28 = Number of address bytes used for Generic Addressable Read/Write Status/Control register commands for nonvolatile registers = 3 byte (default) = 10b Bit 27:26 = Number of dummy bytes used for Generic Addressable Read Status/Control register command for nonvolatile registers in (1S-1S-1S) mode = 10b Bit 25:14 = Not supported = FFFh Bit 13:10 = Number of dummy cycles used for Generic Addressable Read Status/Control register command for nonvolatile registers in (8S-8S-8S) mode = 20 = 1110b (Max available option is 14 cycles) Bit 9:6 = Number of dummy cycles used for Generic Addressable Read Status/Control register command for nonvolatile registers in (8D-8D-8D) mode = 20 = 1110b (Max available option is 14 cycles) Bit 5:4 = Reserved = 00b Bit 3:0 = Number of dummy cycles used for Generic Addressable Read Status/Control register command for nonvolatile registers in (1S-1S-1S) mode = 1000b 179h FBh 17Ah FFh 17Bh EBh 17Ch Status, Control and Configuration Register Map DWORD-5 00h Bits 7:0 = Command used for write access = read only = 00h 17Dh 65h Bits 15:8 = Command used for read access = 65h 17Eh 00h Bits 23:16 = Address of register where WIP is located = 00h (status reg -1 volatile) 17Fh 90h Bit 31 = Write In Progress (WIP) bit is supported = 1b Bit 30 = Write In Progress polarity, WIP = 1 indicates write is in progress = 0b Bits 29 = Reserved = 0b Bits 28 = Bit is set /cleared by commands using address = 1b Bit 27 = Not supported = 0b Bits 26:24 = Bit location of WIP bit in register = bit [0] = 000b 180h Status, Control and Configuration Register Map DWORD-6 06h Bits 7:0 = Command used for write access 181h 05h Bits 15:8 = Command used for read access 182h 00h Bits 23:16 = Address of register where WEL is located = 00h (status reg -1 volatile) 183h A1h Bit 31 = Write Enable (WEL) bit is supported = 1b Bit 30 = Write Enable polarity, WEL = 1 means write is in progress = 0b Bits 29 = Write command is a direct command to wet WEL bit = 1b Bits 28 = Bit is accessed by direct commands to set WEL bit = 1b Bit 27 = Local address for WEL bit is found in last byte of the address = 0b Bits 26:24 = Bit location of WEL bit in register = bit [1] = 001b 184h Status, Control and Configuration Register Map DWORD-7 00h Bits 7:0 = Command used for write access = read only = 00h = Read Only 185h 65h Bits 15:8 = Command used for read access = 65h 186h 00h Bits 23:16 = Address of register where Program Error is located = 00h (status reg -1 volatile) 187h 96h Bit 31 = Program Error bit supported = 1b Bit 30 = Positive polarity (Program Error = 0 indicates no error, Program Error = 1 indicates last Program operation created an error) = 0b Bit 29 = The device has separate bits for Program Error and Erase Error = 0b Bits 28 = Bit is set/cleared by commands using address = 1b Bit 27 = Not Supported = 0b Bits 26:24 = Bit location of Program Error bit in register = bit [6] = 110b 188h Status, Control and Configuration Register Map DWORD-8 00h Bits 7:0 = Command used for write access = read only = 00h = Read Only 189h 65h Bits 15:8 = Command used for read access = 65h 18Ah 00h Bits 23:16 = Address of register where Erase Error is located = 00h 18Bh 95h Bit 31 = Erase Error bit supported = 1b Bit 30 = Positive polarity Erase Error = 0 indicates no error, Erase Error = 1 indicates last erase operation created an error) = 0b Bit 29 = The device has separate bits for Program Error and Erase Error = 0b Bits 28 = Bit is set/cleared by commands using address = 1b Bit 27 = Not Supported = 0b Bits 26:24 = Bit location of erase Error bit in register = bit [5] = 101b 18Ch Status, Control and Configuration Register Map DWORD-9 71h Bits 7:0 = Command used for write access = read only = 71h 18Dh 65h Bits 15:8 = Command used for read access = 65h 18Eh 03h Address of register where wait states bits are located = 03h (Configuration Reg - 2 Nonvolatile) 18Fh D0h Bit 31 = Variable number of dummy cycles supported = 1b Bits 30:29 = Number of physical bits used to set wait states - 4 bit = 10b Bits 28 = Bit is set/cleared by commands using address = 1b Bit 27 = Not Supported = 0b Bits 26:24 = Bit location of LSB of physical bits in register = bit [0] = 000b Table 87 JEDEC SFDP Rev D parameter table (Continued) SFDP byte address SFDP DWORD name Data Description |
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