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FS26 Datenblatt(PDF) 120 Page - NXP Semiconductors |
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FS26 Datenblatt(HTML) 120 Page - NXP Semiconductors |
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120 / 156 page ![]() NXP Semiconductors FS26 Safety system basis chip with low power for ASIL D/ASIL B aaa-045479 LS OFF HS OFF VDDIO = LDOx VPRE VPRE GPIOx out (Slot 2) GPIOxPU_OTP GPIOxPD_OTP LS OFF HS OFF STANDBY LPOFF OTP loading SLOT1 SLOT2 SLOT1 WAKE UP EVENT SLOT2 LP REQ PD enabled LS OFF HS ON OUTPUT Hi-Z LDOx LP configuration LS ON HS OFF LS ON HS OFF LS OFF HS ON LS ON HS OFF Internal pull-up disabled Internal pull-down disabled Figure 42. GPIO Push-pull Active High operation. GPIOx_MODE_OTP = 0 19.3.2.3 GPIO active low mode The active low mode is available only when the GPIOx is configured as a low-side driver. When GPIOx is set as Active Low, as soon as the OTP is loaded, the pin is set to Hi-Z or High, depending on the GPIOxPU_OTP bit. If the GPIOx is assigned to a slot in the power-up sequence, the pin remains High or Hi- Z until it reaches the selected slot. Once the selected slot is reached, the GPIOx low-side driver is asserted low. In normal mode, the internal pull-down resistor is disabled regardless of the GPIOxPD_OTP bit when the GPIOx is set as low-side driver. If the internal pull-down is enabled by OTP, the resistor remains enabled in Low-power modes, except in standby mode, to avoid floating nodes. Default state after OTP loaded Normal mode Standby mode GPIOxLP_ON = 0 LPOFF mode / Deep Fail Safe GPIOxLP_ON = 0 Configuration GPIOx PU_OTP GPIOx PD_OTP PIN HS LS PIN HS LS PIN HS LS PIN HS LS 0 0 Hi-Z OFF OFF Low OFF ON Hi-Z OFF OFF Hi-Z OFF OFF 1 0 High OFF OFF Low OFF ON High OFF OFF Hi-Z OFF OFF 0 1 Hi-Z OFF OFF Low OFF ON Hi-Z OFF OFF Low OFF OFF Low-side driver 1 1 High OFF OFF Low OFF ON High OFF OFF Low OFF OFF Table 119. GPIO Active Low mode behavior summary FS26_SDS All information provided in this document is subject to legal disclaimers. © 2025 NXP B.V. All rights reserved. Product short data sheet Rev. 6.0 — 12 December 2025 Document feedback 120 / 156 |
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