FS26 datasheet(132/156 Pages) NXP

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NXP Semiconductors

FS26

Safety system basis chip with low power for ASIL D/ASIL B

aaa-045496

VSUP > VSUP_UVH

VDDIO = 3.3 V or 5.0 V for SPI

OTP emulation or programming

Debug pin = GND

Regulators Power up

RSTB release

YES

Write all INIT_FS registers

To configure Safety outputs

reaction

LBIST or ABIST Fail will

prevent safety outputs release.

Possibility to go to low power

modes or restart the device

ABIST = OK

LBIST = OK

Open WD window in

FS_WDW_DURATION[15:12] =

0x0000

Close INIT FS with x1 good

Watchdog refresh

Decrease FLT_ERR_CNT to `0'

with sufficient WD_ERR_LIMIT

good WD refreshes

Write command to

RELEASE_FS0B_FS1B[15:0] To

release safety outputs

DBG_EXIT == `1'

External

event

SW action

Information

Device

event

7.4 V < VDEBUG < 8.4 V

Figure 50. OTP mode flowchart until safety outputs release

20.2 Debug mode flowchart

The diagram in Figure 51 explains the steps to enter Debug mode without first entering OTP mode, start the fail-

safe machine in Debug mode, exit Debug mode with the watchdog disabled, and release the safety outputs.

FS26_SDS

All information provided in this document is subject to legal disclaimers.

Product short data sheet

Rev. 6.0 — 12 December 2025

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